Yashwanth Villari
ASIC Design Engineer at Meta, University of Southern California
- Role
- Asic Design Engineer at Meta
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Yashwanth Villari
Computer Architecture and VLSI
Experience
Asic Design Engineer
Feb 2024 — Present · Sunnyvale, CA, US
Education
University of Southern California
Master of Science - MS, Electrical Engineering
2017 — 2019
Jawaharlal Nehru Technological University, Anantapur
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering
2013 — 2017
Skills
- Program Management
- Microsoft Word
- Team Leadership
- Leadership
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