Yashwanth S

About Yashwanth S

Results-driven Firmware Validation Engineer with 8 years of experience in embedded systems, specializing in EC firmware, BIOS validation, and Python-based test automation. Proven expertise in manual and automated validation and enhancing test efficiency through strategic automation frameworks such as RAILS and DUAF.Successfully contributed to high-impact product deliveries including Intel’s LNL platform and Dell’s eDiags tool, earning multiple recognitions for exceptional bug detection, feature validation, and commitment to quality. Demonstrated leadership in guiding test automation strategy, optimizing validation processes, and developing internal tools like auto triage systems to streamline failure analysis.Known for strong collaboration with development teams, with the ability to deliver end-to-end validation solutions that balance rigorous testing, effective automation, and process optimization

Experience

1. System Validation Engineer

   Intel

   Feb 2022 — Present · Bengaluru, IN

   Leading EC firmware validation and automation efforts, focusing on power sequencing, battery, and thermal feature validation for Microchip 17xx-based platforms.•Delivered the LNL platform with zero exceptions, ensuring full compliance with milestone requirements; contributed to this success by automating several complex test cases, which improved overall test efficiency and helped the team meet tight validation timelines.•Designed and automated test cases using Python within the RAILS framework, integrated with the TWS test scheduler; currently leading migration of test execution to the NGA scheduler for better scalability.•Assessed automation feasibility of legacy and new test cases; proposed feature-level enhancements to make automation achievable where needed.•Conducted regular code reviews and contributed improvements to the automation framework to enhance stability, reusability, and modularity.•Developed and maintained test cases aligned with both legacy and new functional requirements (FRs/RCRs), based on system architecture and feature design documentation.•Led validation, debugging, and root cause analysis of EC firmware bugs; collaborated with developers to validate fixes and perform thorough regression cycles.•Initiated and currently developing an Auto Triage Tool that automates failure analysis by collecting logs, analyzing test failures, and flashing EC firmware binaries with various PRs to pinpoint the exact cause.•Provided continuous product improvement suggestions based on test insights and broadened coverage by executing ad-hoc scenarios beyond standard test plans.

Education

• Visvesvaraya Technological University

  Bachelor of Engineering - BE

  2012 — 2016