Yasaswini Mukkera

Design Verification Engineer @Vertex Electronics Hyderabad

Hyderabad, TG, IN
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+91 *********19

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WORK HISTORY

Mar 2021 — Present

Design Verification Engineer @Vertex Electronics Hyderabad

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Hyderabad, IN

EDUCATION

2010 — 2011

Sri Venkateswara Bala Kuteer

SSC

2014 — 2017

Jawaharlal Nehru Technological University, Kakinada

Bachelor of Technology - BTech

2011 — 2014

State Board of Technical Education and Training

Diploma

ABOUT YASASWINI MUKKERA

With a solid educational background in Electronics and Communications Engineering from Jawaharlal Nehru Technological University and specialized training in verification, I\'ve honed my skills in SV, debugging, and code coverage over 3.5+ years at Vertex Electronics Hyderabad. Previously, I contributed to Maven Silicon as a trainee, where I began applying my theoretical knowledge to practical challenges. My core competencies lie in meticulously verifying design specifications, ensuring our products meet the highest standards, and contributing significantly to the success of our engineering team.

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Yasaswini Mukkera — Design Verification Engineer at Vertex Electronics Hyderabad in Hyderabad, TG, IN | Unifers