Xuan Zhong

Rtl Design Engineer @Apple

San Jose, CA, US
EMAILS
x••••••••@apple.com
MOBILE NUMBERS
+14•••••••29

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WORK HISTORY

Jan 2022 — Present

Rtl Design Engineer @Apple

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Cupertino, CA, US

Mixed Signal (Serdes) RTL Digital Design

EDUCATION

2013 — 2015

University of Southern California

Master's degree, Electrical and Electronics Engineering——VLSI

2009 — 2013

Xidian University

Information Engineering

SKILLS

MatlabModelsimPerl ScriptRtl VerificationXilinx IseVhdlC++Asic DesignJavaNc-VerilogCVlsiAlgorithmsVerilogPerlVery-Large-Scale Integration (Vlsi)FpgaAsicCadence Virtuoso

ABOUT XUAN ZHONG

I\'m an hardware engineer in Oracle. I\'m actively seeking ASIC hardware full time position right now.I have hands on experience with physical design, CAD tool development and high frequency(>5GHz) low power VLSI design. I\'m very familiar with scripting languages such as Python, Perl and Tcl. I also have rich experience with Design Compiler, IC Compiler and STA tools like PrimeTime. I have tape out experience with 10 nm technology recently.

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Xuan Zhong — Email, Phone Number & Contact Info | Unifers