Xinyuan Cui
Physical Design and Timing Engineer @NVIDIA
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WORK HISTORY
Physical Design and Timing Engineer @NVIDIA
Santa Clara, CA, US
EDUCATION
The University of Edinburgh
Bachelor of Engineering - BEng, Electronics and Computer Science
University of Pennsylvania
Master of Science - MS, Electrical Engineering
ABOUT XINYUAN CUI
I have practical experience in RTL design and testing, usage of TI instruments, and digital IC design, with confidence in Verilog and System Verilog programming on Vivado. Besides the hardware, I also have research experience in AI area, especially the field of computer vision. Therefore, I have strong interest in the interdisciplinary area between AI and Digital IC, specifically the AI hardware accelerator. Not limited to this, I am also open to any job oppotunities related to Digital IC design and verification.
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