Wishbin Robin
Senior Design Engineer
- Role
- Senior Design Engineer at Neurealm
- Location
- Kochi, KL, IN
- LinkedIn followers
- 500 followers
About Wishbin Robin
I am an RTL/FPGA Design Engineer. I design and test RTL modules on hardware and perform debugging for 5G systems. I am well-versed with hardware description languages (HDL) like VHDL and verilog. I have also worked with digital signal processing (DSP).I get excited about solving complex problems, whether it\'s optimizing performance, reducing power consumption, or ensuring reliability of my designs.
Experience
Senior Design Engineer
Apr 2026 — Present · Kochi, IN
Education
St. Joseph's College of Engineering and Technology, Palai(Autonomous)
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
2018 — 2022
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