Will Odonnell
Senior Staff Validation Engineer | Mixed-Signal SoC | Firmware | FPGA Emulation | AI & Automation in Validation
- Role
- Senior Staff Validation Engineer at Cirrus Logic
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Will Odonnell
I’m a Senior Staff Validation Engineer with over 15 years of experience leading pre- and post-silicon validation, emulation, and firmware development for complex mixed-signal SoCs. My work bridges hardware and software — from FPGA-based emulation and embedded development to system bring-up, automation, and AI-driven innovation in validation tools and infrastructure.At Cirrus Logic, I’ve built a reputation as a trusted technical leader in post-silicon validation, often called on to support complex programs across both the Austin and Edinburgh design centers. I collaborate closely with senior engineering leaders to define validation strategies, enhance infrastructure, and drive process improvement initiatives.Beyond validation, I’ve helped guide Cirrus Logic’s entry into AI-assisted development — evaluating and deploying on-premise LLM and vector database systems, and helping establish the company’s AI architecture foundation.Core Strengths:Silicon validation · FPGA emulation · Embedded firmware development · Mixed-signal SoC bring-up · Python/C/C++ automation · AI/ML integration · Technical leadership · System architecture · Cross-functional collaborationRecent Highlights• Recognized with multiple Cirrus Logic Rockstar Awards for AI architecture innovation and customer firmware delivery support• Invited member of Cirrus Logic’s IT AI Subcommittee, advising on company-wide AI strategy and implementation initiatives• AI assistant project recognized by company leadership and selected as the pilot platform for Cirrus Logic’s enterprise-wide AI assistant initiative• Spearheaded internal evaluations and proofs-of-concept for large language models (LLMs), vector databases, and AI-assisted coding tools• Served on the Cirrus Logic Innovation Conference (CLIC) Technical Committee (2021–2025), representing backend/post-silicon disciplines and moderating technical sessions• Authored multiple award-winning CLIC submissions, including “AI Infrastructure at Cirrus” (2025, 3rd place) and “Magnetic Field Testing” (2023, 3rd place)• Temporarily managed the validation organization (2021–2022), mentoring two new managers before transitioning back to an individual contributor role to focus on AI research and development in validation
Experience
Senior Staff Validation Engineer
Aug 2021 — Present · Austin, TX, US
Product-line technical lead for pre- and post-silicon validation across multiple concurrent SoC programs- Widely recognized technical leader in post-silicon validation planning, processes, and execution- Collaborates closely with senior engineers and cross-functional leaders to define validation strategies and guide infrastructure development- Led and mentored validation engineers in requirements-based test planning and exploratory validation- Contributed to Python-based validation frameworks used across multiple product linesAI and Automation Leadership- Spearheaded evaluations of LLMs, vector databases, and AI-assisted coding tools for engineering applications- Designed an initial evaluation architecture to help assess which AI components were best suited for internal development versus external solutions- Helped launch an initial pilot of Cleo, Cirrus Logic’s first internal AI assistant, as part of an evaluation effort to assess internal versus external deployment paths- Co-developed CleoCoder, a PyCharm plug-in leveraging on-prem LLM servers to assist engineers with code generation and refactoring- Built frameworks enabling internal AI agents to integrate LLMs with enterprise tools (Confluence, Jira, etc.)- Delivered training on AI-assisted coding, prompt engineering, and best practices across engineering and post-silicon teamsR & D and Innovation- Led development of new magnetic sensing test methodologies and best practices - Designed a motorized magnetic testing platform for temperature-based characterization - Directed comprehensive device characterization efforts and established magnetic measurement standardsAdditional Contributions- Led debugger evaluation and ARM v8/CoreSight600 transition; standardized DSTREAM tools across teams- CLIC Technical Committee Member (2021–2025); chaired sessions and hosted guest speakers- Multiple CLIC papers and awards recognizing innovation in validation and infrastructure
Education
Texas McCombs School of Business
Post Graduate Program, Artificial Intelligence and Machine Learning: Business Applications
The University of Texas at Austin
MSEE, Integrated Circuits and Systems
2011 — 2013
The University of Texas at Austin
BSEE, Computer Engineering
2000 — 2004
Skills
- Battery Charger
- Microprocessors
- X86
- Cvs
- I2c
- Mobile Devices
- Fpga
- Embedded Software
- Spectre
- Subversion
- Python
- Scrum
- Verilog-a
- Testing
- Soc
- Rtos
- Ubuntu
- Zigbee
- Debugging
- Embedded Linux
- Fpga Prototyping
- Git
- Bash
- Power Management
- Linux Kernel
- Linux
- Modelsim
- Processors
- C++
- Device Drivers
- Digital Signal Processors
- Verilog
- C
- Matlab
- Ghs
- Arm
- Xilinx Ise
- Clearcase
- Agile Methodologies
- Arduino
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