Wenli W.

Experience

1. Physical Design Engineer

   Qualcomm

   Sep 2015 — Present · Raleigh-Durham, NC, US

   Develop the world\'s first 10nm server processor, tailored to the emerging demands of highly-scalable, performance, power-efficient servers that will fuel the next wave of cloud datacenters – Centriq 2400 Processor.• Successfully tape out two ARM based server processor.• Use JTAG, SCAN capture and SCAN shift to do the test mode timing closure on large SoC.• Use Primetime to check the testmode timing violation for multiple clock signals on the designed chips.• Write testmode related timing constraints for whole chiplet level (top)- JTAG, at-speed scan, etc.• Create the HM level testmode cn template for HM owner to generate their own constraints.• Create timing ECO’s for project tapeout on both chiplet level and hm level.• Maintaine several STA related flow scripts for the testmode

Education

• University of Southern California

  Master of Science - MS, Electrical and Electronics Engineering