Walter Holt
Staff Layout Designer @Microchip Technology Inc.
Chandler, AZ, US
EMAILS
MOBILE NUMBERS
+12•••••••96
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WORK HISTORY
Feb 2018 — Present
Staff Layout Designer @Microchip Technology Inc.
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Chandler, AZ, US
SKILLS
Layout Versus Schematic (Lvs)Physical DesignSramCadence VirtuosoDesign Rule Checking (Drc)FloorplanningBicmosVerilogMicroprocessorsRfHerculesIc LayoutPower ManagementEdaDrcCmosIntegrated Circuits (Ic)FpgaApplication-Specific Integrated Circuits (Asic)Physical VerificationAsicPllSocMixed SignalAnalogLayoutVirtuosoAnalog Circuit DesignLvsCadenceIc
ABOUT WALTER HOLT
Qualification Summary: 39 years of Custom Analog, Mixed Signal, RF, and Memory layout…
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