Aditya Vyawahare
ASIC Design Verification Engineer at Google
- Role
- Silicon Engineer at Google
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Aditya Vyawahare
Working as a DV engineer at Google. My Skills include Verification Environment…
Experience
Silicon Engineer
Aug 2021 — Present · Mountain View, CA, US
Education
Post Graduate student at Centre for Development of Advanced Computing (C-DAC)
Post Graduate Diploma, Very Large Scale Integration (VLSI) design
2016 — 2016
St. Vincent Pallotti College of Engineering & Technology
Bachelor of Engineering (B.E.), Electronics and Telecommunication
2011 — 2015
Portland State University
Master of Science - MS, Electrical and Electronics Engineering
Skills
- C++
- Microsoft Excel
- Robotics
- Fpga
- Asic
- Vhdl
- Application-Specific Integrated Circuits (Asic)
- Questasim
- C
- Programming
- Very-Large-Scale Integration (Vlsi)
- Field-Programmable Gate Arrays (Fpga)
- Vlsi
- Cmos
- System Verification
- Digital Electronics
- Social Skills
- Shell Scripting
- Oop
- Verilog
- Integrated Circuit Design
- Electronics
- Teamwork
- Events Coordination
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