Vivek Thakkar
Senior Software Engineer
- Role
- Software Engineer at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Vivek Thakkar
Embedded Systems / Firmware / OS. Following are my technical skills:Programming: C, C++, C#, Matlab, Python, Verilog, System Verilog, Win32 APIs, RTOSTools & Platforms: Visual Studio, WinAVR, MPLAB X, Code Composer Studio, ModelSim, Synopsys, Cadence, Analog Devices DSP++, RXTCGen,Microsoft Windows, Ubuntu, Linux, FreeRTOS, Jenkins, Coverity, Klockwork, JTAG, DediProg, TTK3, PuTTYProtocols: SPI, I2C, UART, UDP, BACnet, RS-232, RS-485, Ethernet, TCP/IP, Zigbee, Modbus, HECIMicrocontrollers: 8051,89C51,89S52, Atmega series, ARM(Cortex-M), PIC(18F series), Renesas RX63N, TI MSP430, BF536.
Experience
Software Engineer
May 2022 — Present · Hillsboro, OR, US
Led cross-functional integration, validation, and software development for next-generation Intel platforms (Raptor Lake, Meteor Lake, Arrow Lake, Lunar Lake, Panther Lake, Nova Lake) and multiple manageability/security initiatives- Managed end-to-end integration and validation across diverse ingredient teams, delivering fully functional, production-ready releases for PTL P QS,PTL H Beta, and ARL S Refresh under aggressive timelines- Defined/maintained integration requirements, test plans, and automated E2E test suites, accelerating validation cycles and reducing manual effort- Delivered quarterly program reviews to senior stakeholders, highlighting coverage, issue trends, and development progress- Implemented PBI 2.0 schema, documentation, and features in IMSConsole/IMSAssistant; enhanced PBI 1.0, resolved Jenkins/Protex compliance, and supported validation for PTL Alpha releases; improving security and maintainability- Developed Memory Health Insights Provider to normalize and evaluate memory performance counters; Verified and integrated Intel Security Report querying methods- Released and documented Manageability & Security Providers, managed HLK Client/Server for BKC releases, and enhanced validation tools with AMT, PSR2.1, UPID, and PBI optimizations- Developed shared library for CSME NVAR access, tested on LNL and ARL- Maintained and optimized legacy IPF provider code, contributing to PV releases and performance improvements- Co-architected and developed Secure Lock PC software with HECI communication, status UI, and OTP Credential Provider; implemented runtime hardware PIN activation- Designed and implemented PSR Signature Validation to ensure certification readiness- Created a VM-based secure local file storage system for the Manage Work Life project, ensuring data confidentiality and integrity.
Education
North Carolina State University
Master of Science (M.S.) Electrical Engineering, Digital ASIC Design & ASIC Verification
2015 — 2015
University of North Carolina at Charlotte
Master of Science (MS), Electrical and Computer Engineering
2014 — 2014
K.J.Somaiya College of Engg
Bachelor of Engineering (BE), Electrical and Electronics Engineering
2008 — 2012
Skills
- Tcp/Ip
- Troubleshooting
- Microsoft Office
- Pcb Design
- Embedded C
- Python
- Microsoft Excel
- Verilog
- Pspice
- Embedded Software
- Microcontrollers
- Vhdl
- Modelsim
- C
- Programming
- Electronics
- Java
- Matlab
- Embedded Systems
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