Vivek Karekar
Sr Manager , IC Design Engineering at Broadcom
- Role
- Sr Manager, Ic Design Engineering at Broadcom
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Sr Manager, Ic Design Engineering
Apr 2009 — Present
Education
Goa Engineering College
BE, Electronics and Telecommunications
1995 — 1999
Skills
- Soc
- Logic Synthesis
- Rtl Verification
- Gate Level Simulation
- Asic
- Layout
- Static Timing Analysis
- Formal Verification
- Vlsi
- Integrated Circuit Design
- Verilog
- Rtl Design
- Dft
- Project Management
- Functional Verification
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