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Vivek Venkatraman

Senior Analog Design Manager

Role
Senior Analog Design Manager at 新思科技股份有限公司
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers
EngineeringView LinkedIn profile

Experience

  1. Senior Analog Design Manager

    新思科技股份有限公司

    Feb 2025 — Present

Education

  • University of Minnesota

    MS, Electrical Engineering

    2007 — 2009

  • Santa Clara University

    MS, Electrical Engineering

    2002 — 2004

  • Savitribai Phule Pune University

    Bachelor of Engineering (BE), Electronics Engineering

    1997 — 2001

Skills

  • Debugging
  • Tcl
  • Analog
  • Cmos
  • Integrated Circuits (Ic)
  • Mentoring
  • Spice
  • Analog Design and Verification
  • Floorplanning
  • Ic
  • Mixed Signal Design and Verification
  • Analog Circuit Design
  • Simulations
  • Verilog
  • Eda
  • Characterization
  • Serdes
  • Static Timing Analysis
  • Verilog-Ams
  • Cadence Virtuoso
  • Vlsi
  • Soc
  • Asic
  • Mixed Signal
  • Circuit Design

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Vivek Venkatraman — Senior Analog Design Manager at 新思科技股份有限公司 in Bengaluru, KA, IN | Unifers