Vitrag Sheth
- Role
- Asic Static Timing Analysis Engineer at Google
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
Experience
Asic Static Timing Analysis Engineer
Aug 2022 — Present
Skills
- Unix
- Pspice
- Simulations
- Cadence Virtuoso
- Static Timing Analysis
- Programming
- C
- Debugging
- Vlsi
- Assembly Language
- Algorithms
- Matlab
- Digital Signal Processing
- Digital Electronics
- C++
- Circuit Design
- Microcontrollers
- Synopsys Tools
- Simulink
- Electronics
- Physical Design
- Microelectronics
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