Vishwath Bhandary
Tech Lead Pre-silicon verification Engineer /SoC Functional Validation
- Role
- Tech Lead Soc Functional Validation Engineer (Accelerator Stack) at Intel
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Vishwath Bhandary
Vishwath has 14+ years of experience in ASIC verification & Post-si Functional…
Experience
Tech Lead Soc Functional Validation Engineer (Accelerator Stack)
Jul 2021 — Present · Austin, TX, US
Joined the iVE - XPV team in Intel, Austin:Leading the accelerator stack functional validation team for next-gen xeon server projects- Worked on pre-silicon verification of the VISA architecture needed for post-silicon debug- Worked on the debug tool enablement of ITH (Intel Trace Hub) used by post-silicon validation team for debug- Working on functional validation of accelerators in Xeon server team * Validate functional layers of accelerators (DSA,IAA,CPM) on Intel Server Class Xeon CPU\'s.* Collaborate with design & application engineers to understand expected behavior & customer use cases.* Develop & maintain test contents/scripts in automated execution framework (python).* Debug failures to root cause & fix silicon, collateral & hardware/software tools.
Education
DR. T. THIMMAIAH INSTITUTE OF TECHNOLOGY (TTIT)
Electonics & Communication
2005 — 2009
Sri Jayachamarajendra College Of Engineering
Master's degree, VLSI Design
2009 — 2011
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