Vishwanath Muniyappa
Analog Mixed Signal Design @Rivos Inc
Reading, GB
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Dec 2022 — Present
Analog Mixed Signal Design @Rivos Inc
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SKILLS
Static Timing AnalysisApplication-Specific Integrated Circuits (Asic)Analog Circuit DesignTclPhysical DesignVlsiSemiconductorsSimulationsEdaDevice DriversMixed SignalIcCadence VirtuosoMicrocontrollersRtl DesignAnalogDebuggingVerilogCmosSiliconVhdlAsicPcieModelsimCircuit DesignSerdesIntegrated Circuit DesignSocFunctional Verification
ABOUT VISHWANATH MUNIYAPPA
Have 14+ years of silicon proven experience in Transceiver design. Out of 14 years, 8…
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