Vishvanath Janjirala
Sr. Silicon Design Engineer at AMD
- Role
- Senior Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Vishvanath Janjirala
A physical design engineer enhancing knowledge and skills day-by-day. And I seek a competitive environment where I can apply my skills effectively to help realize the goals of an organization in the process of building a career intellectually and personally rewarding.Highly adaptable and a quick learner. Also interested to work at any location.Worked on implementing critical blocks in AI chipExperience in full chip timing closure along all the cross corners.Great understanding of Verilog and flow from RTL to GDS II.Great knowledge in implementing low-power designs and DFT modes.Working experience on Cadence Innovus, Tempus, QRC, Conformal and Synopsys ICC2, FC, Primetime.
Experience
Senior Silicon Design Engineer
Dec 2024 — Present · Hyderabad, IN
Education
Government Polytechnic college warangal
Diploma, Electronics and Communications Engineering
2012 — 2015
Gokaraju Rangaraju Institute of Engineering and Technology
Bachelor of Technology, Electronics and Communications Engineering
2015 — 2018
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