Vishnuraj Ar
- Role
- Broadcom
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Vishnuraj Ar
ASIC physical design
Experience
Present
Education
RIT Kottayam
Bachelor of Technology (BTech), Electronics and Communications Engineering
2002 — 2006
Skills
- Tcl
- Modelsim
- Soc
- Physical Design
- Static Timing Analysis
- Systemverilog
- Perl
- Eda
- Vhdl
- Debugging
- Verilog
- Timing Closure
- Low-Power Design
- Integrated Circuit Design
- Logic Synthesis
- Rtl Design
- Arm
- Asic
- Vlsi
- Ic
- Semiconductors
- Functional Verification
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