Vishal Kevat

✨ CPU Circuit Design Intern @ Intel πŸ’Ό Ex-Intern @ Qualcomm (Nuvia CPU Circuit Design) πŸ§‘β€πŸŽ“ MS ECE | VLSI & Circuit Design | Purdue University πŸŽ“ B.Tech ’22 EEE | NIT Goa |πŸ₯‡Gold Medalist

Role
Cpu Circuit Design Engineering Intern at Intel
Location
Austin, TX, US
LinkedIn followers
500 followers

About Vishal Kevat

I am a VLSI and Circuit Design engineer specializing in SRAM and Register File…

Experience

  1. Cpu Circuit Design Engineering Intern

    Intel

    Sep 2025 β€” Present Β· Austin, TX, US

    Collaborating with hardware teams to develop and integrate advanced memory design methodologies, streamlining implementation workflows and improving design efficiency.β€’ Performing PPA analyses on SRAM macros and proposing optimizations to improve overall memory efficiency.β€’ Automated memory datasheet generation by developing a Perl script that extracts specification from lib files, compiling area, timing, and energy characteristics of memory compiler-generated instances across multiple corners.β€’ Used TCL scripting to create an AVM configuration file embedding power and timing data for SRAM Register File IPs, enabling RedHawk to generate accurate current profiles and capacitance models for voltage drop analysis.

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Vishal Kevat β€” Cpu Circuit Design Engineering Intern at Intel in Austin, TX, US | Unifers