Vishal Patel
- Role
- AMD
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Vishal Patel
Dynamic Senior ASIC Design Verification Engineer with over 12 years of experience…
Experience
Present
Skills
- Css
- Xilinx
- Systemverilog
- Vlsi
- Verilog
- Fpga
- Integrated Circuit Design
- Microprocessors
- Asic
- Embedded Systems
- Linux
- Modelsim
- Microelectronics
- Photoshop
- C
- Programming
- Rtl Design
- Functional Verification
- Digital Electronics
- Microcontrollers
- Shell Scripting
- Tcl
- Cadence Virtuoso
- Vhdl
- Digital Signal Processors
- C++
- Html
- Matlab
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