Vishal Easwaramoorthy
Seeking CPU Design, Verification & Validation NCG roles | CPU DV @ Intel
- Role
- Cpu Dv Intern at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Vishal Easwaramoorthy
CPU core Design Verification Intern at Intel, specializing in x86 architecture, SystemVerilog, and UVM for pre-silicon verification and validation, and silicon bring up activities of P-Core IPs. Experienced in developing coverage-driven environments, writing x86 assembly tests using perl for Structural based Functional Testing (SBFT), and driving functional coverage closure.Currently pursuing an M.S. in Computer Engineering at Texas A&M University, where I have verified complex designs including a MESI-based multicore cache, AMBA APB protocol, MIPS 5-stage pipeline processor, and asynchronous FIFOs. Strong foundation in hardware verification, computer architecture, and constrained-random methodologies.Technical SkillsSystemVerilog | UVM | Verilog | x86 Assembly | Linux | Python | C/C++| Perl | Cadence Xcelium | vManager | Xilinx Vivado | Linux
Experience
Cpu Dv Intern
Sep 2025 — Present · Hillsboro, OR, US
Education
SSN College of Engineering
Bachelor of Technology - BTech
2018 — 2022
Texas A&M University
Master's degree
2024
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