Vishal Bhatt

About Vishal Bhatt

Have more than 17 years of experience in Micro architecture & RTL design of IPs and Subsystems in various domains like IO-MMU, High Speed Serial Interfaces (USB/PCIe), Computer networking (L2/L3 switches), Cache coherence etc. worked on high performance deeply pipelined designs for ASICsExpertise in Verilog, RTL Synthesis,CDC Analysis, STA and LEC. Good working knowledge in DFT/MBISTMultiple ASIC Tape-out experience. Worked on full Chip design cycle from uArch development to Pre-Silicon and Post silicon validation.Protocol and Standards expertise : ARM SMMU, PCI Express, USB, MIPI M-PHY, xHCI, CHI/AXI/AHB/APB, NAND, SPI/QSPI, I2C/SMBUSHDL : Verilog and System VerilogASIC CAD Tools expertise : DesignCompiler, PrimeTime, LEC conformal, DFT Compiler, VCS, NC, Spyglass, Verdi, MATLABOther Interests : Algorithms, Computer Architecture, Data-structures and Machine learning.Goal : To master the art of design and have wide spectrum of domain expertise. Would strive to give something back to the industry which can be termed as game changerYou can get in touch at v••••••••@gmail.com

Experience

1. Principal Engineer

   NVIDIA

   Jun 2023 — Present · Bengaluru, IN

Education

• Sardar Patel University

  M.Sc, Electronics

  2002 — 2004

• Dhirubhai Ambani Institute of Information & Communication Technology

  Master of Technology (M.Tech.), VLSI design

  2005 — 2007

Skills

• Microarchitecture
• Ddr
• Processors
• Vlsi
• Modelsim
• Static Timing Analysis
• Ic
• Axi
• Perl
• Eda
• Computer Architecture
• Rtl Coding
• Verilog
• I2c
• Dft
• Usb3.0
• Rtl Design
• Mipi
• Fpga
• Asic
• Microprocessors
• Pcie
• Ddr2
• Field-Programmable Gate Arrays (Fpga)
• Primetime
• Algorithm Design
• Machine Learning
• Usb
• Spi
• Amba Ahb
• Perl Script
• Logic Design
• Logic Synthesis
• Fpga Prototyping
• Functional Verification
• Low-Power Design
• Systemverilog
• Debugging
• Data Structures