Vishal Bhartiya

About Vishal Bhartiya

As a Technical Leader Design Verification at STMicroelectronics, I perform key roles in verifying the functionality and performance of digital circuits and embedded systems for various applications. I also collaborate with design, software, and system teams to ensure the quality and reliability of the products.I have a master\'s degree in Electronics and Communications Engineering from Indian Institute of Technology, Indore, where I specialized in Communication and Signal Processing Engineering. I have published a paper on a hardware neuron design for machine learning at Springer\'s International Symposium on VLSI Design and Test. I have also done collaborative research and written my thesis on hardware accelerator design for machine learning with PhD fellows in the VLSI lab at IIT Indore.I have three years of experience as a Design Verification Engineer at Qualcomm, where I worked on speech enhancement algorithms and models for mobile devices. I have developed and implemented various test cases, scenarios, and scripts using various tools and languages. I have also contributed to the optimization and debugging of the code and the verification environment.I am passionate about learning new technologies and solving challenging problems in the field of design verification and machine learning. I am motivated by the opportunity to create innovative and impactful solutions that can improve the lives of people and the society. I am also committed to continuous improvement and professional growth.

Experience

1. Lead Design Verification Engineer

   STMicroelectronics

   Dec 2022 — Present · IN

Education

• Indian Institute of Technology, Indore

  Master's degree

  2017 — 2019