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Vishal Yadav

Physical Design Engineer @ Synopsys | R&D | PD | STA | VLSI | ASIC | SoC | PnR | Signoff | Digital Design | IET Lucknow 2021

Role
Asic Physical Design Engineer at Synopsys Inc
Location
Hyderabad, TG, IN
LinkedIn followers
500 followers
EngineeringView LinkedIn profile

About Vishal Yadav

Physical Design Engineer with 4.8+ years of Experience in RTL2GDSII, Layout and Mixed…

Experience

  1. Asic Physical Design Engineer

    Synopsys Inc

    Aug 2024 — Present · IN

Education

  • Saraswati Niketan Inter College, Sirkoni Jaunpur U.P.

    Intermediate, Mathematics and Science

    2014 — 2016

  • B.N.S. ENGLISH SCHOOL Naria BHU Varanasi

    High School

    2012 — 2014

  • Institute of Engineering and Technology

    Bachelor of Technology - BTech, Electronics & Instrumentation Engineering

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