Vishal M
Design Verification Engineer | GLS engineer.
- Role
- Design Verification Engineer at Sevya Multimedia
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Vishal M
Skills- Digital Electronics Verilog System Verilog Universal Verification Methodology ( UVM) Python, git
Experience
Design Verification Engineer
Mar 2024 — Present · Hyderabad, IN
Education
Malla Reddy Engineering College
Bachelor of Technology - BTech
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