Vish Sundararaman
Ph D at Syracuse University
- Role
- Packaging Engineering Manager at Texas Instruments
- Location
- Dallas, TX, US
- LinkedIn followers
- 500 followers
About Vish Sundararaman
Experienced Packaging Engineering Professional with a proven history and excellence in the semiconductors industry. Skilled in semiconductor packaging/assembly - design, materials, processes and manufacturing; proficient in engineering management (technical and people), semiconductor device design and manufacturing, quality and reliability assurance, and risk management; Passionate about problem solving, and an analytical and critical thinker; Ph D in Mechanical Engineering from Syracuse University and MS in Materials Science and Engineering from the University of Notre Dame
Experience
Packaging Engineering Manager
Mar 1999 — Present
Education
Indian Institute of Technology, Madras
BTech, Metallurgical Engineering
1983 — 1987
University of Notre Dame
Master of Science, Materials Science and Engineering
1987 — 1990
Syracuse University
Ph D, Mechanical Engineering
1990 — 1996
Skills
- Microelectronics
- Cross-Functional Team Leadership
- Finite Element Analysis
- Cad
- Engineering
- Characterization
- Materials Science and Engineering
- Electronics
- Simulations
- Process Development
- Spc
- Statistical Process Control (Spc)
- Semiconductors
- Product Development
- Fmea
- Process Simulation
- Solid Mechanics
- Materials
- Cmos
- Integrated Circuits (Ic)
- Reliability Engineering
- Failure Analysis
- Semiconductor Industry
- Engineering Management
- Ic
- Design of Experiments
- Manufacturing
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