Virun Heda

Experience

1. Senior Post Silicon Validation Engineer

   NVIDIA

   Nov 2011 — Present · Bangalore, IN

   Ownership and leading phy electrical SI Validation and measurement on USB, PCIe, SATA, Ethernet (10G-BASE-T, 100BASE-T1 etc).In-depth analysis of all interfaces,debugging them and make sure they pass with good margins.Analysis of Analog Blocks such as CTLE, DFE, REFGEN, TX Pre-drivers required for Blessing of Analog Design.Evaluating the Spec requirements for Electrical Compliance for HSIO interfaces and ordering the equipment, connector and accessories required to setup.Board requirements, Schematic Design feedbacks and Reviews, Layout Reviews and feedback required to characterize Interfaces such as USB3 Gen1/Gen2, PCIe, SATA, Ethernet etc.Customer Issues debugs, supporting, addressing related to System failures interms of electrical issues in the time line provided.Debugged several SI issues related to ISI, Xtalk/Coupling in PKG/PCB, SSN/SSO, EMI/EMC, Insertion and Return loss, Intra/Inter Pair Skews, Common mode noise, Differential Pair Cross over issues etc.Good exposure to understanding board Designs, Board Layouts, and debug Board related issues. providing Post layout Simulation data review/feedback for critical Interfaces to sign-off.Strong hands on expertise in using test equipment used in validation ( High Speed Oscilloscope, signal generators, Protocol Analyzers, Bit error rate tester (BERT) for measurement and debugging issues.Generate test plans and characterization reports for both internal and external customers to clearly illustrate performance for key protocols/features/circuits

Education

• Geetanjali Institute Of Technical Studies

  BE

  2003 — 2007

• Indian Institute of Technology, Delhi

  MTech

  2007 — 2009

Skills

• C
• Fpga
• Verilog
• Pspice