Venkatesh J

Engineering Manager

Role
Sr Electronics System Design Engineer at GE Vernova
Location
Hyderabad, TG, IN
LinkedIn followers
500 followers

About Venkatesh J

Total 19+ years of experience in the fields of Analog Board design & Automated Functional Test Support.1 year and 4 months of experience in building test jigs (rigs) for testing brakes using NI Hardware & Labview and breakdown maintenance of machines. 13 years of experience in Electronic Board design for Turbine Control Systems and Oil Well Control Application.As Lead Engineer/Technologist, in GE Energy, Hyderabad, from Nov 2007 till date.As an Instrumentation Engineer in Engineering Research & Development centre in TVS-Brakes India Limited Chennai, from Aug 2006 to Nov 2007.Areas of Expertise:Experienced in Preparing Circuit board Design requirements, design calculation, simulation, Layout support, Prototype Validation, Compliance certification( such as EMC,UL), HALT testing of Electronic boards and manufacturing Functional test support.Experienced with microcontroller based design,worked on ARM Cortex-A8 Sitara Processor for IoT Product.Patented my circuit to make a single board instead of using 3 different boards for constant wetting current at different voltages in the area of turbine control system.As part of MarkVe Life extension design efforts, visited power plant for beta site support for GE Mark V to MarkVe turbine control system up-gradation.Experience with both Cadence Allegro and Mentor design suites.Software Design, Development, Testing & Deployment for Automated Test Equipment’s and Test & Measurement Instruments. Qualities & Traits:Ability to serve as a good team member in excellent spirit with others.Ability to guide a team efficiently.Ability to complete individual assignments well in time.Learn new technologies within a short duration.Efficient business communication skills, soft skills & interpersonal skills.Strong diagnostic, analytical and problem solving abilitiesSpecialities: •Analog Circuit Board design, Prototype Validation,System testing,Functional test(In Manf line),Environmental testing,HALT, UL & EMC validation.

Experience

  1. Sr Electronics System Design Engineer

    GE Vernova

    Sep 2025 — Present · Hyderabad, IN

Education

  • Anna University Chennai

    B.E, EEE

    2002 — 2006

Skills

  • Firmware
  • Six Sigma
  • Scada
  • Instrumentation
  • Environmental Testing
  • Plc
  • Teststand
  • Control Systems Design
  • Manufacturing
  • Calibration
  • Ni Labview
  • Hardware Architecture
  • Hardware Reliability Analysis
  • Testing
  • Electrical Engineering
  • Automation
  • Validation
  • Electronics
  • Sensors
  • Fmea
  • Test Automation
  • Labview
  • Data Acquisition
  • System Testing
  • Pcb Design

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Venkatesh J — Sr Electronics System Design Engineer at GE Vernova in Hyderabad, TG, IN | Unifers