Viren Rathod

About Viren Rathod

ASIC Verification professional with 16+ years of experience in the semiconductor industry. Extensive experience in ASIC verification methodologies, including UVM, SystemVerilog, and assertion-based verification. Proficient in verification planning, testbench development, test case creation, and functional coverage closure. In-depth knowledge of industry-standard protocols such as AMBA AXI, I2C, SPI and HDMI. Strong debugging skills and expertise in using simulation tools and hardware emulators. Proven track record of successful project delivery, meeting tight deadlines, and ensuring quality verification closure. Excellent team player with the ability to lead and collaborate with cross-functional teams. Strong analytical and problem-solving skills, with a keen eye for detail.

Experience

1. Principal Design Verification Manager

   Microsoft

   Mar 2025 — Present · Bengaluru, IN

Education

• Dharmsinh Desai University

  B.E., Electronics & Communication

  2005 — 2009

Skills

• Vmm
• Application-Specific Integrated Circuits (Asic)
• Arm
• Functional Verification
• Vhdl
• Soc
• Hdmi
• Debugging
• Verilog
• Uvm
• Rtl Verification
• Universal Verification Methodology (Uvm)
• Open Verification Methodology
• Systemverilog
• Asic
• System on a Chip (Soc)
• Very-Large-Scale Integration (Vlsi)
• Vlsi
• Perl