Virender Pal

@ Aura Semiconductor Pvt Ltd

Role
Doe at Aura Semiconductor
Location
Panipat, HR, IN
LinkedIn followers
500 followers
Manufacturing & ProductionView LinkedIn profile

Experience

  1. Doe

    Aura Semiconductor

    Jan 2022 — Present

Education

  • Kurukshetra University

    B.Tech, Electronics

    2000 — 2004

  • Kendriya Vidyalaya

    12, Science

    1998 — 1999

  • CDAC

    PGDEVD, VLSI & Embedded

    2007 — 2007

Skills

  • Timing Closure
  • Low-Power Design
  • Cadence Virtuoso
  • Rtl Design
  • Physical Design
  • Analog Circuit Design
  • Integrated Circuit Design
  • Microprocessors
  • Vlsi
  • Debugging
  • Functional Verification
  • Drc
  • Floorplanning
  • Eda
  • Systemverilog
  • Verilog
  • Modelsim
  • Dft
  • Mixed Signal
  • Circuit Design
  • Physical Verification
  • Static Timing Analysis
  • Tcl
  • Analog
  • Lvs
  • Cadence
  • Ic
  • Vhdl
  • Soc
  • Power Management
  • Semiconductors
  • Fpga
  • Cmos
  • Asic
  • Pll

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Virender Pal — Doe at Aura Semiconductor in Panipat, HR, IN | Unifers