Vinod Kumar

WORK HISTORY

EDUCATION

SKILLS

ABOUT VINOD KUMAR

TITLE:Design & Verification Engineer with 4 year experience in front end verification and logic design.EXPERIENCE:7Years’ experience (1-year internship + 6-year Job) in the field of IP/SOC Verification with complex IP protocols. • Currently working as Design Engineer-Verification II at Incise Infotech Pvt ltd Noida on A client site for NXP Semiconductor. • Worked on Arm M7 and A53 series-based SOC. • Worked on Platform Module of a SOC, like MULTICORE, etc. • Worked on System generation use cases for vision subsystem and having knowledge of Rectifier, DOF, LLNR LG IP’s etc. • On CPU based SOC, worked on Ip’s like Flexray, FlexPWM, TMU etc. • Worked on GLS for ARM based SOC. • Having good debugging skills using Tarmac and LST file. • Published Research Paper on Automated Coverage Register Access Technology on UVM Framework for Advanced Verification in ISCAS. • Worked as Design and Verification Engineer at Xinoe System Pvt. Ltd, Gurgaon for 1 Year.• Worked on FPGA Spartan 6 and ZYNQ board. SKILL SET-Languages: Verilog HDL, SystemVerilog, C, C++-Making verification plans for different modules-Good debugging skills-Running regression-Scripting languages: PERL-Methodology: UVM-Protocols: I2C, AXI,APB, AHB,UART, 10g Ethernet mac core -SOC design : AHB2AXI bridge-Tools: xillinx ISE Design suite, Mentor Questasim, Modelsim, Pspice simulator, vivado, system generator, NCSIM, Synopsys VCS, cadence incisive-OS: Linux, Windows.PROJECTS:1. Functional verification of AXI4 to AHB lite bridge using UVM.2. Verification 10g Ethernet mac core using UVM and its memory registers using UVM.2. Verification of AXI slave and AXI master and its memory registers using UVM.3. Functional verification of AHB lite master using UVM methodology.4. Verification of I2C Master using System verilog.5. Verification of AHB2WISHBONE Bridge using System verilog.6. Design of clock gated low power sequential circuit design of 8 bit ALU.