Vinod Balusu
Engineering Manager @SmartSoC Solutions Pvt Ltd
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WORK HISTORY
Engineering Manager @SmartSoC Solutions Pvt Ltd
Hyderabad, IN
EDUCATION
Jawaharlal Nehru Technological University, Kakinada
Bachelor of Technology - BTech, Electronics and Communications Engineering
Indian Institute of Technology, Roorkee
Master of Technology - MTech, VLSI
ABOUT VINOD BALUSU
Professional Summary:# 10+ years layout design experience in RFIC,IO and PMIC blocks like VCO, LDO, XPIO, HBMIO, XPIO and CLDO Power Management.# Building and Managing Team Count of 100+ Engineers at different client requirements.# Layout design capability in multiple technologies like FinFet : TSMC 3nm, 5nm, 7nm,16nm CMOS: 28nm 40nm 130nm # Worked as schematic designed for 9 stage ring oscillator with 500MHz frequency in TSMC 60nm with phase noise PSD of -120dBc/Hz and created schematic setup of ESD for ring oscillator with ESD tolerance of 2 KV HBM and Supply Voltage is 1.8V.# Created butterworth LPF in TSMC 28nm with Order:4, DC gain: 0dB, Cutoff frequency of 10MHz, Differential Peak-Peak input signal swing: 2V, SNDR at output is: 60dB and Power dissipation < 250uW.# Experienced in Hierarchical layout assembly, Top level and Block level floor-planning, Top level Routing, Top level ESD Power/Ground Planning, Hierarchical RF Signal flow, Clock lines Routing, Digital lines routing channel plan.# Layout techniques include : Shielding, Cross-Couple matching, Common Centroidal and Interdigitation matching, Electron Migration, Density Fill.# Good debug skills : Fix LVS shorts, soft check errors, fix ERC errors, Delta Voltage DRC.# Tools Used: Cadence Virtuoso 20.Caliber : LVS/DRC/ERC/PERC/Voltage DRCLayout XL GXL EXL : Cloning, Annotation Browser, Device Binding, Multi-patterning.SKILL-CAD : Layout Automation.Totem: Used this tool to find ESD static rule check, Worst EM check and able to run Totem flow with the Help of Designer# Good knowledge on Cadence Skill Programming.# Written many skill scripts to ease the layout design and save much timeAuto PIN’s creation, Density Calculation, Selection filter, Decap Mesh fill. and many based on Task Oriented.# Independently working experience with remote designers(USA, Singapore, Malaysia and Europe).# Good Knowledge on Perl, Unix and SVRF # Interested to work both schematic and layout as per given specifications. Specialties: Cadence layout design, shell scripting, specification, good debugging skill, troubleshooting,
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