Vincent Mirian
System Architect & Design | Team Lead | Low-Latency Optimization | Infrastructure & Tooling | Software: C++ and Python | Hardware: SystemVerilog targeting FPGAs | Bilingual: English and French
- Role
- Hardware Team Lead - Quantitative Engineer at Goldman Sachs
- Location
- New York, NY, US
- LinkedIn followers
- 500 followers
About Vincent Mirian
I am a System Architect with over 10 years of system design and research experience. My hardware design strengths are developing and optimizing algorithms for a variety of architectures. My software experience includes writing parallel programs, implementing computer-aided design (CAD) tools, implementing Linux drivers and Object-Oriented applications for embedded systems, desktop systems and large-scale systems. My system design experience includes designing and optimizing applications in a system with accelerators such as FPGAs and GPUs. My research experience focuses on computer architecture with a strong concentration on FPGAs.I also have over 10 years of managerial experience in the hospitality industry that demonstrates my business mindset to pursue a company’s objective. All my experiences make me a well-rounded individual and suitable candidate for a leading role in the technology industry.Currently, I am open to explore new opportunities. I am interested in roles in finance (fintech), primarily in High-Frequency Trading (HFT) and Hedge Fund firms. I am open to work anywhere in New York City - USA.Summary of technical skills: VHDL, SystemVerilog - RTL design, developing and testing hardware C++, Java - Object-Oriented development C, Assembly - Embedded System development SystemC - Developing and testing hardware Python - Object-Oriented development and scripting OpenCL, CUDA - Parallel programming Linux Kernel - Driver and Kernel development
Experience
Hardware Team Lead - Quantitative Engineer
Jan 2023 — Present · New York, NY, US
Design, develop and implement the hardware and software components of the trading system. Plan and manage the hardware deliverables of the trading system. Development languages include C/C++, SystemVerilog and Python. Devise the roadmap of several projects. Research emerging technologies to drive business strategy.Responsibilities:– Provided technical guidance on the design of the trading system achieving optimal performance.– Introduced an efficient development methodology for hardware designs and implemented supporting tools and infrastructure. The tools and infrastructure included: an IDE setup for productive development, a simulation framework with utilities developed in C++ for testing the hardware, helper libraries for commonly used tasks, C++ software models of hardware components for verification, a SystemVerilog to C++ struct converter for seamless integration into C++, and, other.– Implemented a versatile communication framework abstracting the software-hardware communication.– Introduced a SystemVerilog coding style for readability.– Implemented fuzzing infrastructure for automated design verification.– Implement a market data replay framework for testing and debugging the trading system.– Mentor junior and mid-level team members.Achievements:– Re-design a hardware component to utilize 50% less logic units and 700% less memory units with a 3.5x reduction in latency compared to the original design. The latter resulted in a 45% reduction in overall latency. Moreover, the latency of the re-designed component when scaled to N items is constant (an absolute cost of one time-unit), whereas the latency of the original design when scaled to N items is linear (a cost of N time-units).– Re-design a hardware component to utilize 128x less memory units.– Increased unit testcases by 800% and testing coverage by 70% discovering several faults and errors.– FINRA Series 3 Certified.
Education
York University
Bachelor of Applied Science (B.A.Sc.), Computer Engineering
2004 — 2008
York University
Bachelor's degree, Computer Science
2001 — 2004
University of Toronto
Doctor of Philosophy (Ph.D.), Computer Engineering
2010 — 2016
University of Toronto
Master's degree, Computer Engineering
2008 — 2010
Skills
- Research
- Assembly Language
- Kernel Drivers
- Consulting
- Linux Kernel
- Linux
- Computer Architecture
- C
- Programming
- Opencl
- Edk
- Javascript
- Planahead
- Vhdl
- Simulations
- C++
- Algorithms
- Promela
- Objective-C
- Perl
- Embedded Systems
- Software Development
- Python
- Latex
- Java
- Computer Engineering
- Cuda
- Xilinx Ise
- Verilog
- Fpga
- Matlab
- Pthreads
- Ansi C
- Altera Quartus
- Php
- Testing
- Css
- Floorplanning
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