Vinayak Patankar
Vice President, Chip and Systems Validation
- Role
- Vice President, Chip and System Validation at d-Matrix
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
Experience
Vice President, Chip and System Validation
May 2020 — Present · Santa Clara, CA, US
Skills
- Ic
- Soc
- C
- Functional Verification
- Systemverilog
- Semiconductors
- C++
- Project Planning
- Rtl Design
- Assertion Based Verification
- Asic
- Uvm
- Java
- Verilog
- Eda
- Team Leadership
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