Vinayak Hiremath
IP Logic Design Engineer @ Intel | Ex-Samsung
- Role
- Ip Logic Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Ip Logic Design Engineer
Jun 2022 — Present · Bengaluru, IN
Education
G M Institute of Technology, Davangere
Bachelor's Degree, Electronics and Communications Engineering
2009 — 2013
Sandeepani School of Embedded & VLSI Design
VLSI Frontend Design & Verification, VLSI, Verilog, SystemVerilog, FPGA, Design, Verification
2013 — 2014
Skills
- Microsoft Office
- Altera Quartus
- Stratix V Fpga
- Xilinx Ise
- Powerpoint
- Verilog
- Fpga
- Vhdl
- Modelsim
- Spartan
- Photoshop
- C
- Systemverilog
- Functional Verification
- Leonardo Spectrum
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