Vinayak Hegde
Physical Design Engineer
- Role
- Physical Design Engineer at 英特尔
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
About Vinayak Hegde
Email: v••••••••@gmail.comPhone: 32•••••••59 years of experience in CPU/GPU/ASIC and Wireless SoC Physical Design.Specialization- ASIC, CPU, GPU, Wireless SoC Physical Design- RTL to GDS- Physical-aware Synthesis- Place and Route- Static Timing Analysis (STA) and timing closure - Physical Verification (DRC/LVS)- Reliability Verification (IR/EM/Antenna)- Signal Integrity- Low power design Skills- Languages & HDLs : Tcl, Perl, Shell, Verilog- EDA tools: Synopsys Fusion Compiler, ICC, ICC II, Primetime, Design Compiler, Cadence Virtuoso, Innovus, Encounter, Mentor Calibre, Apache Redhawk
Experience
Physical Design Engineer
Aug 2022 — Present · US
Education
National Institute of Technology Karnataka
Bachelor of Technology (B.Tech.), Electrical & Electronics Engineering
2009 — 2013
University of Southern California
Master of Science (M.S.), Electrical Engineering
2013 — 2015
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