Vinay Tharamani

About Vinay Tharamani

I am a trained fresher, looking for oppurtunity in the domain of vlsi industry as a Design and Verification Engineer.Having worked on live projects and hands on lab experience.My skill are :+ Digital Electronics + Verilog + System Verilog + UvmI have a knowledge on protocols like APB, Axi, SPI, I2C, UART etc.

Experience

1. Design Verification Engineer

   Vlsi First

   Aug 2022 — Present · Hyderabad, IN

   Learned advanced topics of Digital Electronics - Learned designing of various circuits using Verilog HDL - Gained an understanding of ASIC design flow - Learned verification using System Verilog - Universal Verification Methodology - Basics of writing Assertions- I got a very good Knowledge of VLSI RTL Design and some techniques about Constraint Random Coverages Driven Verification.

Education

• JNTUH College of Engineering Hyderabad

  Bachelor of Technology - BTech, Electrical and Electronics Engineering

  2019 — 2022

• Global Concept School

  Secondary School Certificate (Regular)

  2015 — 2016

• Auroras Polytech Academy

  Diploma of Education, Electrical and Electronics Engineering

  2016 — 2019