Vilesh Shah
Distinguished Engineer Asteralabs
- Role
- Distinguished Engineer at Astera Labs
- Location
- Sunnyvale, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Distinguished Engineer
Mar 2022 — Present · Santa Clara, CA, US
Education
Indian Institute of Technology, Bombay
M. Tech, Communication Engineering
1994 — 1995
Skills
- Vlsi
- Asic
- Verilog
- Rtl Design
- Semiconductors
- Integrated Circuit Design
- Software Development
- Debugging
- Embedded Systems
- Eda
- Soc
- Dft
- Arm
- Application-Specific Integrated Circuits (Asic)
- Tcl
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