Vilas Jadav
Modem hardware design verification engineer at Apple
- Role
- Modem Hardware Design Verification Engineer at Apple
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
About Vilas Jadav
Modem HW design verification engineer at Apple, Inc.# Modem HW design verification engineer at Intel Inc.# Senior verification engineers at Perfectvips, CA, USA.# Joined as senior R&D engineer and worked as manager verification at Mirafra software technologies pvt ltd Bangalore, India since Sept 2010# ASIC engineer at einfochips limited from may-2007 to sept-2010Client companies: Qualcomm, Teradyne, Rockwell, Rambus, Renesas and CiscoExperience:# Verification languages: System Verilog, C++# Methodology: UVM, OVM, VMM# Working experience as full-time, off-shore and on-site engineer# Modem, VOQ(Virtual output queue), DDR, MIPI SLIM Bus etc.
Experience
Modem Hardware Design Verification Engineer
Dec 2019 — Present · CA, US
Education
U. V. Patel college of engineering, Mehsana, Gujarat
B.E. in Electronics and Communication., Electronics and Communication.
Skills
- Vmm
- Open Verification Methodology
- Rtl Design
- Soc
- Vlsi
- Asic
- Universal Verification Methodology (Uvm)
- Verilog
- Modelsim
- Ncsim
- Functional Verification
- Systemverilog
- Specman
- Ddr
- Uvm
- Amba Ahb
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.