Vikas Anaokar

Senior Design Verification Engineer @Arm

Cambridge, GB
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Apr 2023 — Present

Senior Design Verification Engineer @Arm

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Cambridge, GB

Part of Arm\'s IP verification team working on future of Computing On arm for Everyone.* Delivering Arm\'s Functionally safe Generic Interrupt Controller IP product for Automative Systems.* Delivering Verification Deliverables for next Gen AI Hardware.* Using AI in IP Verification.* Line Management* Formal Verification using Cadence Jasper tool.* Tool testing

EDUCATION

2012 — 2016

Atharva College of Engineering Mumbai

Bachelor’s Degree, Electronics Engineering

2011 — 2012

Matushtri Kashiben Vrijlal Valia High School Mumbai

High School, Science

2016 — 2017

Centre for Development of Advanced Computing (C-DAC)

Post Graduate Diploma in VLSI Design, VHDL,Verilog,FPGA,System Architecture

2010 — 2011

NIIT

C++ Edgeineer Course, Computer Science

2019 — 2020

University of Liverpool

MSc. Microelectronic Systems, Electrical and Electronics Engineering

2009 — 2010

Airforce School Jamnagar

10th Standard, General Studies

SKILLS

HtmlCookingSimulationsCProgrammingPowerpointMicrosoft ExcelPublic SpeakingInternet of ThingsC++PresentationsMicrosoft PowerpointFunctional CoverageMatlabArmProject ManagementKuka RobotsJavaArduinoMusicManagementElectronicsMicrosoft WordEmbedded SystemsMicrosoft OfficeVlsi

ABOUT VIKAS ANAOKAR

Senior Design Verification Engineer at Arm. More than 6 years of experience in Design Verification. Worked with UVM and System Verilog on IP level verification of Generic Interrupt controller for Functional Safety applications. Experience of Line Management.Graduated with Distinction (80%+) Grade for MSc. Microelectronic Systems at University of Liverpool in 2020. Received Sir Robin Saxby Award for distinguished student.Past Experience in SoC verification in Wipro Limited, India. Knowledge of High Speed Data Bus Architectures like PCIE and Ethernet. Worked on Low Power SoC Tests. Responsible for Functional Coverage closure and debugging failures. Working knowledge of OVM methodology. Received award of \"Above and Beyond\" for outstanding contribution.Completed PG Diploma in VLSI Design from Centre for Development for Advanced Computing, India.Completed Bachelors of engineering from Atharva College of Engineering, Mumbai. Received Award for contributing to Atharva Satellite Ground Station.Ambition to be a successful leader in semiconductor industry.

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Vikas Anaokar — Senior Design Verification Engineer at Arm in Cambridge, GB | Unifers