Vikas Yesankar

Senior Design Verification Engineer at NVIDIA

Role
Senior Design Verification Engineer at NVIDIA
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Vikas Yesankar

A graduate in Electronics and Telecommunication from COEP (an autonomous engineering institute ranked among top 20 engineering colleges in India). Overall good academic background. A merit holder in 10th standard.A skilled engineer having hands on experience in front end design verification. Having an excellent experience in developing reusable, plug & play eVC and UVC components using eRM and UVM methodologies. Hands on experience in developing module level testbenches from the scratch for complex designs. For example,* GPU cache memory modules and its submodules design verification* Memory management unit design verification* JESD transceiver design verification* Thermal and Voltage controller design verificationHave a very good understanding about ARM Architecture, especially ARM exception model, Virtual memory system architecture, Hardware virtualization, Blind hypervision, etc.Have developed and managed build and regression setup for a project, perforce branch integrations, various automations using python and perl.Hold full responsibility for verification from design specification to verification sign off. Highly dependable and passionate about work. Good programming, debugging and problem solving skills.* HDL/HVL languages - VHDL, Verilog, System Verilog, Specman, C, C++* Verification methodology - eRM, UVM* Scripting Language - Shell scripting, Perl, Python* Design and verification tools - NCSim, Specman, Xilinx ISE, VCS, Verdi* Revision control tools - CVS, SVN, GIT, Mercurial, Perforce* Bus protocols - APB, AXI, ACE

Experience

  1. Senior Design Verification Engineer

    NVIDIA

    Oct 2024 — Present · Karnataka, IN

Education

  • COEP Technological University

    B. Tech, Electronics and Telecommunication

    2006 — 2010

Skills

  • Functional Verification
  • Debugging
  • Vhdl
  • Simulations
  • C++
  • C
  • Embedded Systems
  • Cache Verification
  • Shell Scripting
  • Ncsim
  • Systemverilog
  • Rtl Verification
  • Universal Verification Methodology (Uvm)
  • System Verilog
  • Uvm
  • Hardware Architecture
  • Specman
  • Verilog

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Vikas Yesankar — Senior Design Verification Engineer at NVIDIA in Bengaluru, KA, IN | Unifers