Vikas Gokhale

Director, Design Engineering @Socionext US

Santa Clara, CA, US
MOBILE NUMBERS
+14•••••••65

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WORK HISTORY

Apr 2025 — Present

Director, Design Engineering @Socionext US

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Milpitas, CA, US

EDUCATION

1989 — 1993

Devi Ahilya Vishwavidyalaya

B. E., Electronics and Instrumentation

1985 — 1989

Shree Dayanand Higher Secondary school, indore

Higher Secondary 12th Grade, Mathematics & Science

1995 — 1997

Indian Institute of Technology, Kanpur

M. Tech, Electrical Engg

SKILLS

Rtl DesignFunctional VerificationProcessorsTclPcieRtl CodingProtocols(Pcie, Axi, Amba, Usb, Plb, Ddr)Integrated Circuit DesignTestingBus ModelsAmba AhbSignal IntegrityPerlEmbedded SystemsEdaDftVerilogTechnical LeadershipIcLogic SynthesisMicro-Architecture/DesignVlsiPhysical DesignSocXilinxSystemverilogArmSemiconductorsStatic Timing AnalysisTiming ClosureFpgaVhdlSimulationsAsicLintFormal VerificationDebuggingSiliconLintingUsb

ABOUT VIKAS GOKHALE

Accomplished, customer-focused IC design engineering leader leveraging over 18 years of experience leading cross-functional, global teams in the development of complex system-on-a-chip (SoC) designs, from RTL to production silicon. Recognized as a strong and resourceful leader in building cohesive teams and partnering with cross functional business leaders to effectively manage and deliver on a multitude of ASIC/SoC design projects. Core competencies:Application-Specific Integrated Circuit (ASIC)/System-on-Chip (SoC)| Verilog/System Verilog Micro-architecture/Design | Project LeadershipSynthesis (Design Compiler)| STA (Prime Time)Formal Verification | Verification | FPGA prototypingProcessors (ARM, PowerPC, V850E)| Protocols/Standards (Networking, PCI-E, AXI, USB, DDR3/L/4) CAREER HIGHLIGHTS 10+ years of hands-on experience in Register Transfer Level (RTL) design and verification Ability to provide comprehensive design debug support (verification, FPGA emulation, silicon validation) Experience leading all aspects of complex system-on-a-chip (SoC) designs from micro-architecture, RTL, synthesis/STA to tape-out to production Experience with many complex SoC chips for AR/VR, Server, Data Center, Mobile Daomin, involving, DSPs, multi-core processors (ARM M0+, M33, A7, A9, R4, A52,A72, A53/PowerPC etc.) & Interface IPs, NoC, CCNs etc. Provided technical guidance & expertise in implementing efficient synthesis/STA methodology Strong problem solving, decision making and communication skills

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