Vikas Agrawal
- Role
- Senior Associate Engineer at IBM
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Vikas Agrawal
Done projects related to Memory Designing, FPGA, Processor, RTL Design. Languages…
Experience
Senior Associate Engineer
Aug 2020 — Present · Bengaluru, IN
DRAM RAS Verification : Detection of different types of error in a given DRAM and isolate it to smallest level possible using ECC.
Education
Bhilai Institute of Technology (BIT), Durg
Bachelor of Engineering (B.E.), electronics and telecommunication
2013 — 2017
International Institute of Information Technology Bangalore
MTech - Master of Technology, VlSI Systems
2018 — 2020
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