Vijay Prakash M

About Vijay Prakash M

Experienced EDA and VLSI professional involving HLS of SystemC/C++ designs, Verification IP Development, ASIC/FPGA design and verification.Expertise- High Level Synthesis, VIP, ASIC & FPGA development - SystemC, System Verilog, Verilog HDL, VHDL, Specman e- UVM, Formal, Coverage, HLSEC, Logic Synthesis, Power EstimationExperience- High Level Synthesis product engineering, Verification IP\'s development and validation and SoC Development - Design and Verification of digital IP and sub-systems- Sound knowledge on bus protocols such as AMBA, WLAN, OCP, CAN/ TTCAN, PCI, USB- Good experience in testbench, testplan and testcase development- Experience in code coverage, assertions, checkers, monitors and bus functional model development- Validation/ Protoyping of DUTs in FPGAs- Experience in full design flow of IP development- Experience in architecture, design development, implementation of hardware designs.

Experience

1. Product Engineering Architect

   Cadence

   Jul 2022 — Present · Bengaluru, IN

Education

• ACCEL Technologies Ltd.

  Post Graduate Diploma in VLSI Design

  2000 — 2001

• Madurai Kamaraj University

  Bachelor of Engineering, Electronics & Communication

  1996 — 2000

Skills

• Application-Specific Integrated Circuits (Asic)
• Vlsi
• Physical Design
• Usb
• Timing Closure
• Specman
• Ic
• Formal Verification
• Modelsim
• Tcl
• Logic Synthesis
• System Verilog
• System on a Chip (Soc)
• Verilog
• Systemverilog
• Fpga
• Perl
• Eda
• Asic
• Debugging
• Functional Verification
• Systemc
• Computer Architecture
• Rtl Coding
• Integrated Circuit Design
• Vhdl
• Processors
• Low-Power Design
• Arm
• Soc
• Rtl Design