Vignesha Pavenje
SoC Design Engineer at Intel
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Vignesha Pavenje
SoC Design Engineer with 14 years of experience in DFx and RTL Construction and Integration. Skilled as Individual contributor and mentoring small-medium teams.
Experience
Soc Design Engineer
Feb 2021 — Present · Bengaluru, IN
Education
Visvesvaraya Technological University
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
2004 — 2008
Skills
- Encryption
- Rtl Verification
- Rtl Coding
- Soc
- Rtl Design
- Digital Signal Processing
- Logic Synthesis
- Verilog
- Eda
- Lte
- C++
- Vhdl
- Static Timing Analysis
- Dvb-C
- Fpga
- Asic
- C
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