Vidyanandgouda Patil
Physical Design and STA
- Role
- Physical Design at Rivos Inc
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Physical Design
Apr 2024 — Present · Austin, TX, US
Education
KLES College of Engineering & Technology Belgaum Karnataka, India
BE, Electronics and Communication
2006 — 2010
North Carolina State University
Master's degree, Computer Engineering
2016 — 2018
Visvesvaraya Technological University
Bachelor of Engineering (BE), Electronics and communication Engineering
2006 — 2010
Skills
- Cmos
- Pnr
- Debugging
- Analog
- Linux
- Vlsi
- Std Cell Architecture
- Training
- Mixed Signal
- Assura
- Layout Versus Schematic (Lvs)
- C
- C++
- Lef
- Verilog
- Application-Specific Integrated Circuits (Asic)
- Drc
- Cadence Skill
- Perl
- Physical Design
- Semiconductors
- Library Development
- Very-Large-Scale Integration (Vlsi)
- Lvs
- H-Spice
- Cadence Virtuoso
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