Vidhaya Datta Reddy Metta
Graduate Research Assistant @Paul G. Allen School Of Computer Science & Engineering
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WORK HISTORY
Graduate Research Assistant @Paul G. Allen School Of Computer Science & Engineering
Seattle, WA, US
Designed data/command path separation logic for particle detector FPGAs, routing particle physics event data through DMA pipeline to DDR while directing configuration commands to distributed RAM for non-blocking CPU access• Executed FPGA-CPU interface validation including DMA integrity checks, PCIe FPGA carrier card testing, register-level debugging, and multi-lane synchronization protocol testing achieving 1.2 Gb/s throughput with benchmark utilities• Lab: Adaptive Computing Machines and Emulators (ACME)| Advisor: Prof. Scott Hauck
EDUCATION
Vellore Institute of Technology
Bachelor of Technology - BTech, Electronics and Communications Engineering
University of Washington
Master of Science - MS, Electrical and Electronics Engineering
ABOUT VIDHAYA DATTA REDDY METTA
Hardware Design Enthusiast with a strong background in static and dynamic CMOS technologies. Experienced with industry-standard computer-aided design tools like Cadence (Virtuoso, DRC, LVS) and Avanti (Hspice). Skilled in hardware description and verification languages like VHDL and SystemVerilog.
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