Venugopala Rao Danaboina

Staff Engineer @高通

Hyderabad, TG, IN
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Sep 2021 — Present

Staff Engineer @高通

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EDUCATION

2010 — 2012

Manipal Institute of Technology

Master of Technology (MTech), Digital Electronics and Advanced communications

SKILLS

SocMrepairDebuggingSynopsys ToolsDdr3-Phy BistVerilogSimulationsMbistBistAtpgRtl & Gatelevel Simulations and DebugJtagDftTclRtl

ABOUT VENUGOPALA RAO DANABOINA

10 years of experience in DFT.work with Qualcomm, STMicroelectronics, Synapse Techno design.Active and key involvement in successful tape out of SoC’s finds applications in areas of Automotive, Imaging, mobiles etc. on technologies varies from 65nm to 28nm CMOS, 28nm FDSOI and 7nm to 4nm FINFET • Hands on experience on Scan, Compression techniques, ATPG, DRC analysis, Coverage analysis, Pattern Simulation, Debugging • Hands on experience on LBIST insertion • Have strong Knowledge on JTAG, MBIST and MRepair • Contributed to DFT flow improvements • Constraint delivery to STA team and Post silicon support Technical skills:• Languages :C, Verilog, Perl, TCL, STIL• Simulators :Cadence NCSim, VCS• EDA Tools Knowledge:DFT compiler, DFTMAX, Tetramax, TestKompress

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Venugopala Rao Danaboina — Staff Engineer at 高通 in Hyderabad, TG, IN | Unifers