Venugopala Rao Danaboina
Staff Engineer @高通
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WORK HISTORY
Staff Engineer @高通
EDUCATION
Manipal Institute of Technology
Master of Technology (MTech), Digital Electronics and Advanced communications
SKILLS
ABOUT VENUGOPALA RAO DANABOINA
10 years of experience in DFT.work with Qualcomm, STMicroelectronics, Synapse Techno design.Active and key involvement in successful tape out of SoC’s finds applications in areas of Automotive, Imaging, mobiles etc. on technologies varies from 65nm to 28nm CMOS, 28nm FDSOI and 7nm to 4nm FINFET • Hands on experience on Scan, Compression techniques, ATPG, DRC analysis, Coverage analysis, Pattern Simulation, Debugging • Hands on experience on LBIST insertion • Have strong Knowledge on JTAG, MBIST and MRepair • Contributed to DFT flow improvements • Constraint delivery to STA team and Post silicon support Technical skills:• Languages :C, Verilog, Perl, TCL, STIL• Simulators :Cadence NCSim, VCS• EDA Tools Knowledge:DFT compiler, DFTMAX, Tetramax, TestKompress
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