Venkateshwar Motamarri
Machine Learning Asic Design - Senior Rtl Ip Design Engineer - Compute Ip Group @Google
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WORK HISTORY
Machine Learning Asic Design - Senior Rtl Ip Design Engineer - Compute Ip Group @Google
Bengaluru, IN
TPU Design @Google 6 Patents filed! Bringing the best-in-class AI hardware accelerators and Machine learning to Pixel!
EDUCATION
Vellore Institute of Technology
Bachelor's degree, Electronics and Communications Engineering
Indian Institute of Technology, Kharagpur
Summer project , Mixed Signal VLSI Design
ABOUT VENKATESHWAR MOTAMARRI
Working on the RTL design of in-house TPU - a cutting-edge hardware accelerator for machine learning, with the goal of empowering Pixel to become smarter than ever before!10+ patents filed in the direction of implementing the most efficient AI accelerator; Focus is on improving performance, data throughput and TTFW latency, reducing power and minimizing act/parameter storage requirements Have previously worked on:> RTL design of access control IPs (Firewalls and Realm allocators)> RTL design and micro-architecture of in-house SMMU IP from scratch, deliverable to the next-gen Snapdragon processors.> Design and feature implementation for 400G Ethernet MAC Controller> Micro-architecture and RTL Design of Packet Processor core for smart-NIC> Design of cache controller and feature implementation for high-speed communication PHYResearch interests: Hardware accelerators for deep learning, LLMs, compute for AI, virtual memory architectures, secure AI
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