Venkatesh Mahadevan
Member of Technical Staff, Design Verification @AMD
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WORK HISTORY
Member of Technical Staff, Design Verification @AMD
San Jose, CA, US
Working on the verification of a NoC slave unit module that serves as the primary agent allowing any NoC master to interact with any NoC slave, using AXI 3/4/stream protocols.2. Verification at the block level involved creating a Bus Functional Module and creating and running several directed and random tests to verify the MSI and its interaction with different AXI masters.3. Coverage collected via regressions is used to fine tune and improve design behavior, as well as track verification progress.4. Currently working on the verification of next generation NoC technology using chiplet architectures, which will be incorporated in upcoming AMD AI accelerators.
EDUCATION
University of Toronto
BASC, Electrical Engineering
University of Toronto
Master’s Degree, Electrical Engineering
Swami Vivekanand International School
High School Graduate
Bhavans College
Electrical and Electronics Engineering
SKILLS
ABOUT VENKATESH MAHADEVAN
I am currently a design verification engineer at AMD, and am working on verifying multiple generations of the NoC for various upcoming products.
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